For devices and wiring lines formed above a semiconductor substrate, a technique is known that inspects a difference from design data by using an inspection image picked up by a Scanning Electron Microscope (SEM) apparatus.
However, in the conventional technique, when the inspection image is compared with the design data, a consideration is given to voltage contrast, but no disclosure is included about performing pattern matching between the design data and the inspection image to correct the positional deviation between the design data and the inspection image picked up by the SEM inspection apparatus.